Efficient Implementation of DVI Protocol on FPGA

Computer and Knowledge Engineering

مقالات آماده انتشار، پذیرفته شده، انتشار آنلاین از تاریخ 10 خرداد 1404   

نوع مقاله: Special Issue

شناسه دیجیتال (DOI): 10.22067/cke.2025.91345.1142

نویسندگان

Sara Ershadi-Nasab^{* 1}؛ Danial Bayati²؛ Saeed Yazdani³

¹Assistant Professor at Computer Engineering department, Ferdowsi University of Mashhad

²Computer Engineering department, Ferdowsi University of Mashhad

³Computer Engineering department Ferdowsi university of Mashhad

چکیده

This paper presents a general-purpose hardware implementation of the digital visual interface (DVI) protocol on the Xilinx Virtex-6 ML605 FPGA platform for real-time display of digital processing results. The design enables direct output of processed data from the FPGA to an external monitor without relying on external processors or software-based rendering tools. It addresses key challenges in timing synchronization, pixel formatting, and interfacing with the onboard Chrontel CH7301C encoder to support resolutions up to 1920×1080 at 60 Hz. A lightweight processing pipeline is developed in Verilog to convert multidimensional outputs into a sequential stream of pixel data conforming to the DVI protocol. As a case study, a lightweight convolutional neural network trained on the CIFAR-10 dataset is implemented on the FPGA, and its classification probabilities are displayed as a probability map on an LCD. Experimental results confirm low resource utilization and real-time performance, validating the system’s applicability in embedded applications such as machine learning inference, image processing, and real-time monitoring. This work demonstrates the feasibility of FPGA-based platforms for efficiently displaying digital video output in intelligent edge systems.

کلیدواژه‌ها

Digital visual interface؛ field programmable gate array؛ image processing؛ real-time؛ video processing؛ Xilinx Virtex-6